/*============================================================================*/
/*  Copyright (C) 2009-2011, iSOFT INFRASTRUCTURE SOFTWARE CO.,LTD.
 *  
 *  All rights reserved. This software is iSOFT property. Duplication 
 *  or disclosure without iSOFT written authorization is prohibited.
 *  
 *  
 *  @file       <Can.h>
 *  @brief      <Can Registers define>
 *  
 * <Compiler: TASKING V3.5    MCU:TC17XX>
 *
 *  @author     <jianan.liu>
 *  @date       <03-18-2014>
 */
/*============================================================================*/
#ifndef  CAN_REGS_H
#define  CAN_REGS_H
/*=======[R E V I S I O N   H I S T O R Y]====================================*/
/*  <VERSION>    <DATE>    <AUTHOR>    <REVISION LOG>
 *  V1.0.0       20140318  jianan.liu   Initial version
 *  V1.0.1       20140715  bo.zeng      define MACRO CAN_WDT_CON0 to lock/unlock 
 *                                      Endinit-protected registers
 *  V1.0.2       20140721  bo.zeng      remove SRC related define 
 *  V1.0.3       20140827  bo.zeng      1. change some macro define
 *                                      2. Modata in Can_MbRegType
 */
/*============================================================================*/

/*=======[V E R S I O N  I N F O R M A T I O N]===============================*/
#define CAN_REG_H_AR_MAJOR_VERSION  2
#define CAN_REG_H_AR_MINOR_VERSION  4
#define CAN_REG_H_AR_PATCH_VERSION  0
#define CAN_REG_H_SW_MAJOR_VERSION  1
#define CAN_REG_H_SW_MINOR_VERSION  0
#define CAN_REG_H_SW_PATCH_VERSION  2

/*=======[I N C L U D E S]====================================================*/
#include "ComStack_Types.h"
#include "Can_Cfg.h"
/*=======[M A C R O S]========================================================*/

/* Enable CAN module */
#define CAN_ENABLE_MODULE             0x00000000U

/* State of CAN diable*/
#define CAN_DISABLE_STATE            0x00000002U

/* Normal divider mode */
#define CAN_FDR_DM_NORMAL            0x00004000U

/* Panel busy flag */
#define CAN_PNCTR_BUSY               0x00000100U

/* initialize all lists */
#define CAN_PANCMD_INIT              0x00000001U

/* Allocate message object to a list statically */
#define CAN_PANCMD_STATIC_ALLOCATE   0x00000002U

/* Disable can node and enbale configuration change */
#define CAN_NODE_DISABLE             0x00000041U

/* Error control register initial value */
#define CAN_NECNT_EWRNLVL            0x00600000U

/* Receive Error Count */
#define CAN_NECNT_REC                0x000000FFU

/* Transmit Error Count */
#define CAN_NECNT_TEC                0x0000FF00U

/* CAN frame counter initial value */
#define CAN_NFCR_FRAME_CFC           0x00000000U

/* Reseive Mb value */
#define CAN_RX_MB_SET                0x00A00F5FU

/* Transmit Mb value */
#define CAN_TX_MB_SET                0x0E0801F7U

/* Set Message Valid */
#define CAN_MSG_VALID                0x00200000U

/* Set Message Invalid */
#define CAN_MSG_INVALID              0x00000020U

/* Enabel rx interrupt of mb */
#define CAN_MB_RX_INT_ENABLE         0x00010000U

/* Enabel tx interrupt of mb */
#define CAN_MB_TX_INT_ENABLE         0x00020000U

/* Enable Mask IDE */
#define CAN_ENABLE_MIDE              0x20000000U

/* IDE for extended ID */
#define CAN_MBID_ID_EXTENDED         0x20000000U

/* IDE for standard ID */
#define CAN_MBID_ID_STANDARD         0x1FFC0000U 

/* priority class is CAN ID */
#define CAN_PRI_CLASS_ID             0x80000000U

/* Set start mode */
#define CAN_SET_START_MODE           0xFFFFFFBEU

/* Set stop mode */
#define CAN_SET_STOP_MODE            0x00000001U

/* Enabel transfer interrupt */
#define CAN_ENABLE_TR_INT            0x00000002U

/* Enabel busoff interrupt */
#define CAN_ENABLE_BUSOFF_INT        0x00000008U

/* Data length */
#define CAN_DATA_LENGTH              0x8U

/* IDE bit, 0=standard ID, 1=extended ID */
#define CAN_IDE                      0x20000000U        

/* Set TX request */
#define CAN_SET_TXRQ                 0x07000000U

/* DLC (data length code) */
#define CAN_MBCS_LENGTH              0x0F000000U        

/* init flag */
#define CAN_NCR_INIT                 0x00000001U

/* clear init flag */
#define CAN_NCR_INIT_CLEAR           0xFFFFFFFEU

/* Bus off interrupt flag */
#define CAN_NSR_BOFF                 0x00000080U        

/* EWRN interrupt flag */
#define CAN_NSR_EWRN                 0x00000040U        

/* Alert interrupt flag */
#define CAN_NSR_ALERT                0x00000020U

/* Bus off clear */
#define CAN_NSR_ALERT_CLEAR          0xFFFFFFDFU

/* LEC flag */
#define CAN_NSR_LEC                  0x00000007U

/* LEC clear */
#define CAN_NSR_LEC_CLEAR            0xFFFFFFF8U

/* TX OK */
#define CAN_TX_OK                    0x00000008U

/* RX OK */
#define CAN_RX_OK                    0x00000010U

/* Mb Tx OK */
#define CAN_MB_TX_MASK               0x00000002U

/* Mb Rx OK */
#define CAN_MB_RX_MASK               0x00000001U

/* SET NEWDAT bit */
#define CAN_MCTSTR_NEWDAT            0x00080000U

/* New data flag */
#define CAN_RES_NEWDAT_MASK          0x00000008U

/* Message lost flag */
#define CAN_RES_MSGLST_MASK          0x00000010U

/* MB is invalid */
#define CAN_RES_MSGVAL               0x00000020U

/* CAN Mb address offset */
#define CAN_MB_ADDR_OFFSET           0x20U

#define CAN_CLC_REG           (*(P2VAR(uint16 volatile, AUTOMATIC, AUTOMATIC)) CAN_BASE_ADDR)
#define CAN_FDR_REG           (*(P2VAR(uint32 volatile, AUTOMATIC, AUTOMATIC)) (CAN_BASE_ADDR + 0xCU))
#define CAN_PNCTR_REG         (*(P2VAR(uint32 volatile, AUTOMATIC, AUTOMATIC)) (CAN_BASE_ADDR + 0x1C4U))
#define CAN_MCR_REG           (*(P2VAR(uint32 volatile, AUTOMATIC, AUTOMATIC)) (CAN_BASE_ADDR + 0x1C8U))
#define CAN_MSPND_REG         ((P2VAR(uint32 volatile, AUTOMATIC, AUTOMATIC)) (CAN_BASE_ADDR + 0x140U))

/* WDT Control Register 0 */
#define CAN_WDT_CON0             (*(P2VAR(uint32 volatile, AUTOMATIC, AUTOMATIC)) (0xF00005F0U))
#define CAN_WDT_CON0_ENDINIT     0x00000001U
#define CAN_WDT_CON1             (*(P2VAR(uint32 volatile, AUTOMATIC, AUTOMATIC)) (0xF00005F4U))
#define CAN_WDT_CON1_DR          0x00000008U
#define CAN_WDT_CON1_IR          0x00000004U

/* CAN Node Registers */
typedef struct
{
    uint32 Ncr;
    uint32 Nsr;
    uint32 Nipr;
    uint32 Npcr;
    uint32 Nbtr;
    uint32 Necnt;
    uint32 Nfcr;
}Can_NodeRegType;
typedef P2VAR(Can_NodeRegType volatile, AUTOMATIC, AUTOMATIC) Can_NodeRegPtrType;

/* CAN Node Registers */
typedef struct
{
    uint32 Mofcr;
    uint32 Mofgpr;
    uint32 Moipr;
    uint32 Moamr;
    uint8  Modata[8];
    uint32 Moar;
    uint32 Mctstr;
}Can_MbRegType;
typedef P2VAR(Can_MbRegType volatile, AUTOMATIC, AUTOMATIC) Can_MbRegPtrType;

#endif  /* #ifndef  CAN_REGS_H */

/*=======[E N D   O F   F I L E]==============================================*/


